ESD Protection Methods
To protect against ESD, a designer can either add the protection externally or choose ICs with high levels of protection built in. Protection circuitry includes metal-oxide varistors and silicon avalanche suppressors such as the TransZorb. These devices are effective but expensive (silicon avalanche protectors cost as much as $0.30 per line). External ESD protection also consumes valuable board area and adds capacitance to the I/O line.
To overcome these limitations, manufacturers have repeatedly raised the level of ESD protection in their ICs. Maxim, for example, now provides ±15kV protection for RS-232 ICs, whether tested in accordance with IEC 1000-4-2 or the human body model.
High-Speed ESD Protection
As IC manufacturers have achieved higher frequencies of input/output (I/O) interconnects, such as with USB 2.0, they have continued to decrease the minimum dimensions of the transistors, interconnections, and the silicon dioxide (SiO2) insulation layers in their devices. This decrease results in smaller structures for higher-speed devices that are more susceptible to breakdown damage at lower energy levels. SiO2 layers are more likely to rupture, and metal traces are more likely to open or bridge during an ESD event.
Figure 5. ESD protection devices attempt to divert a potentially damaging charge away from sensitive circuitry and protect the system from permanent damage.
The changing application environment is also contributing to increased ESD vulnerability. A proliferation of laptop computers and handheld devices such as cell phones, personal digital assistants (PDAs), and other mobile devices are being used in uncontrolled environments (i.e., no wrist-grounding straps or conductive and grounded table surfaces). In these environments, people are likely to touch I/O connector pins during the connecting and disconnecting of cables.
The traditional methods for shunting ESD energy away from the ICs involved devices such as zener diodes and MOVs that have moderate capacitances of 10 to 100 pF. Now with higher signal frequencies, these devices cannot be used without distorting the signal beyond recognition or detection.
Many ICs are designed with limited internal ESD protection, allowing them to tolerate from 1- to 2-kV pulses (per the human body model [HBM]), but some ICs are not capable of tolerating even 100 V without suffering damage. Many IC data sheets do not even specify an ESD tolerance voltage, so users must do their own testing to determine the tolerance of the IC. The creation of ESD charges also varies widely with ambient relative humidity (RH). Walking across a vinyl tile floor with more than 65% RH generates only 250 V of ESD; however, if the RH is less than 25%, normal in dry environments, electrostatic potentials of more than 12,000 V can be generated.
ESD Protection Devices
A variety of technologies are used in devices for ESD protection.
Figure 6. A parasitic capacitor here is too high to pass high-frequency signals without significant distortion.
Zener Diodes. One traditional device, the zener diode, is generally poorly suited for very high-speed I/O interfaces because the lowest capacitance of existing devices is about 30 pF (shown as a parasitic capacitor in Figure 2). This capacitance is too high to pass high-frequency signals without significant distortion. This distortion results in unreliable detection of the signals and increased high-frequency roll-off. Zener diodes could be made with lower capacitances, but this would result in ESD voltages insufficient to meet the 6–8-kV protection levels necessary.
TVS Diodes. There are some TVS devices on the market that add a regular diode in series with the zener diode to effectively lower the net capacitance. To handle positive- and negative-polarity ESD pulses, a second zener and series diode pair (in the opposite polarity) must be placed in parallel with the first pair of diodes. Unfortunately, the resulting capacitance of 5–6 pF is still not low enough to avoid distortion of high-speed I/O signals.
MOVs. MOVs can achieve slightly lower capacitances than TVS devices, but currently the lowest-capacitance MOV device available has a capacitance of 3 pF, which can still exceed the allowable load on high-speed interconnects.
Figure 7. Regular diodes can be used to clamp the ESD pulses to the power or ground rail so the current flow is always in the diode's forward direction.
Dual-Rail Clamp Diodes. Zener diode capacitances are high because their structures must be sufficiently robust to tolerate reverse breakdown phenomena. To eliminate the need for the zener's breakdown, regular diodes can be used to clamp the ESD pulses to the power or ground rail. Using this solution, the current flow is always in the diode's forward direction, as shown in Figure 3. This setup allows the use of smaller, and therefore lower, capacitance diodes. Positive ESD pulses are clamped to the positive supply rail, and negative ESD pulses are clamped to ground. (The system-bypass capacitors and power supply are responsible for shunting this extra energy on the positive rail back to ground. This can sometimes be aided by also adding a local zener diode, which does not affect the signal load.)
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