Wednesday, January 26, 2011

Electrostatic Discharge [静電放電]--Part 1


私は電子工学製造会社で働きます。開発方法間に多い問題があります。そして、ESD は一般的な問題です。この主題は面白いですから、今日 私達はそれを話会っています。もしあなたはどんな質問があったら、それを分配しましょう。

          Electrostatic discharge (ESD) event is the transfer of energy between two bodies at different electrostatic potentials, either through contact or via an ionized ambient discharge (a spark). ESD can threaten an electronic system when someone replaces a cable or even touches an I/O port. Discharges that accompany these routine events can disable the port by destroying one or more of its interface ICs (Figure 1). Such failures can also be costly—they raise the cost of warranty repairs while diminishing the product's perceived quality.
 
Figure 1.  ICs with inadequate ESD protection are subject to catastrophic failure-including ruptured passivation, electrothermal migration, splattered aluminum, contact spiking, and dielectric failure.
Figure 1. ICs with inadequate ESD protection are subject to catastrophic failure—including ruptured passivation, electrothermal migration, splattered aluminum, contact spiking, and dielectric failure.
           ESD has another way of causing trouble. Manufacturers may soon be barred from selling to the European community unless their equipment meets minimum levels of ESD performance. These two factors, coupled with the increasing amount of electrical communication between computers and computer-related equipment, lend emphasis to the need for engineers to understand ESD.
          A proper understanding of ESD requires an awareness not only of the voltage levels involved, but also of the voltage and current waveforms, IC-protection structures, test methods, and application circuits. These matters are discussed in the following sections.

ESD Generation
          Electrostatic charge appears when two dissimilar materials come together, transfer charge, and move apart, producing a voltage between them. Walking on a rug with leather soles, for example, can generate voltages as high as 25kV. The level of electrostatic voltage induced depends on the relative charge affinity between rug and shoe leather, the humidity, and other factors.
         The triboelectric series (Table 1) describes this charge affinity between various materials. Charge transfer occurs when any two items on the list are brought into contact. Materials higher in the series acquire positive charge, and those lower in the series acquire negative charge.1 The net charge and resulting electrostatic voltage is greater for items farther apart on the list.
 ESD Test Method: IEC 1000-4-2 Model
       The more stringent method for testing ICs that include I/O pins is IEC 1000-4-2. This equipment-level test was developed by the International Electrotechnical Commission. Originally intended as an acceptance condition for equipment to be sold in Europe, it is rapidly gaining acceptance as a standard ESD criterion in the United States and Japan as well. Though not originally intended as an IC specification, it now does extra duty as an ESD test for ICs. Like the modification to 3015.7, it tests only the I/O pins.
          The model for IEC 1000-4-2 is again the circuit of Figure 2, but with different component values. The resistance R2 (330Ω) represents a human holding a screwdriver or other metallic object, and C1 (150pF) represents another estimate of human-body capacitance. This circuit produces a current waveform (Figure 2) with a rise time steeper than that produced by Method 3015.7.
Figure 4. Parameters for this ESD waveform (rise time, peak current, amplitude at 30ns, and amplitude at 60ns) are specified by IEC 1000-4-2.
Figure 2. Parameters for this ESD waveform (rise time, peak current, amplitude at 30ns, and amplitude at 60ns) are specified by IEC 1000-4-2.
        IEC 1000-4-2 specifies ESD testing both by contact discharge and by air discharge. ESD events caused by actual contact are more repeatable but less realistic, and air discharge is more realistic but subject to wide differences in waveform shape—according to variations in temperature, humidity, barometric pressure, distance between IC and electrode, and rate of approach to the IC pin. (This change of shape can have a significant effect on the measured level of tolerance for ESD.)
          IEC 1000-4-2 defines four levels of compliance (Table 2) according to the lowest maximum voltage withstood by the I/O pins. The table defines these levels both for contact discharge and for air discharge.

Contact or Air Discharge?
          Testing ICs for ESD ruggedness per IEC 1000-4-2 requires the use of an ESD "gun," which allows testing with either contact discharge or air discharge. Contact discharge requires physical contact between the gun and the I/O pin before test voltage is applied by a switch internal to the gun. Air discharge requires the gun to be charged with test voltage before it approaches the I/O pin (from the perpendicular, and as quickly as possible). The second technique produces a spark at some critical distance from the test unit.
          ESD produced by air discharge resembles actual ESD events. But, like actual ESD, the air-discharge variety is not readily duplicated. It depends on many variables that are not easily controlled. Thus, attesting to the general importance of repeatability in testing, IEC 1000-4-2 recommends contact discharge, and the modified 3015.7 method requires contact discharge only. In either case, the test procedure calls for at least 10 discharges at each test level.
          The main difference between the two ESD standards just discussed—the modified 3015.7 method and the air- or contact-discharge version of IEC 1000-4-2—is in the peak currents they produce in the device under test. Different component values can cause these peak currents to differ by a factor greater than five (Table 5). Because peak currents produce the unwanted power that an IC must dissipate, IEC 1000-4-2 is usually the more demanding test method for ESD. 


         High current can damage an IC in various ways:
  • Excessive local heating
  • Melted silicon
  • Spiked junctions, caused by a short that dissolves aluminum in the silicon (Figure 3)
  • Damaged metal lines
  • Gate-oxide failure due to excessive voltage
  • Transistor damage due to electrothermal migration (Figure 4)
 Figure 5. High-ESD current in an IC can 'spike' a junction by partially dissolving the aluminum contact in silicon, causing a permanent short to the layer below.

Figure 3. High-ESD current in an IC can "spike" a junction by partially dissolving the aluminum contact in silicon, causing a permanent short to the layer below.

Figure 6. Electrothermal migration (ETM) in an IC can set the stage for damage in the presence of an ESD event. The resulting high current and high voltage can cause a short circuit or low-impedance path between the terminals of a transistor.
Figure 4. Electrothermal migration (ETM) in an IC can set the stage for damage in the presence of an ESD event. The resulting high current and high voltage can cause a short circuit or low-impedance path between the terminals of a transistor.
[To be continued]

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